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Add Span API for SMA, EMA, and WMA with zero-allocation performance improvements
- Implemented zero-allocation methods for SMA, EMA, and WMA calculations using ReadOnlySpan and Span. - Added unit tests for Span API to validate input, match TSeries calculations, handle NaN values, and ensure zero allocation. - Enhanced documentation to include usage examples for the new Span API. - Introduced performance benchmarks comparing the new Span API against existing TSeries implementations and other libraries.
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@@ -77,11 +77,44 @@ Console.WriteLine($"Current EMA: {result.Value}");
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// Access current value property
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Console.WriteLine($"Current Value: {ema.Value.Value}");
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// Batch calculation
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// Batch calculation (TSeries API)
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TSeries source = ...;
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TSeries results = Ema.Calculate(source, 10);
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// High-performance Span API (zero allocation)
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double[] prices = new double[10000];
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double[] output = new double[10000];
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Ema.Calculate(prices.AsSpan(), output.AsSpan(), period: 10);
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// Or with direct alpha:
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Ema.Calculate(prices.AsSpan(), output.AsSpan(), alpha: 0.1818);
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```
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### Zero-Allocation Span API
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For performance-critical scenarios (backtesting, HFT), use the Span-based overload:
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```csharp
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// Allocate buffers once, reuse across calculations
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double[] source = new double[200000];
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double[] emaOutput = new double[200000];
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// Zero heap allocation during calculation - by period
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Ema.Calculate(source.AsSpan(), emaOutput.AsSpan(), period: 100);
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// Or by alpha for direct control
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Ema.Calculate(source.AsSpan(), emaOutput.AsSpan(), alpha: 0.02);
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// Results are written directly to output buffer
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Console.WriteLine($"Last EMA: {emaOutput[^1]}");
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```
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**Benefits:**
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* **Zero allocation**: No GC pressure during calculation
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* **Cache-friendly**: Sequential memory access patterns
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* **Hunter's bias correction**: Same accuracy as TSeries API
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* **Compatible** with `ArrayPool<T>` for buffer management
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### Multi-Alpha EMA (`EmaVector`)
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The `EmaVector` class is a SIMD-optimized implementation for calculating multiple EMAs with different periods on the same input series simultaneously. It leverages hardware intrinsics (AVX/SSE) for high performance.
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